aiXcelerate 2019: Tutorial and Tuning Workshop
Dear (potential or current) user of the RWTH Compute Cluster,
We cordially invite you to this year’s aiXcelerate 2019 tutorial on
performance analysis on December 2-3, and tuning workshop on December
4-5, 2019 (see https://www.itc.rwth-aachen.de/aiXcelerate).
This event focuses on CLAIX-2018, the new Supercomputer that has been
set up in late 2018. In 2019, it was further extended to become the
main HPC platform of RWTH Aachen University’s IT Center. It is
currently the fastest computer among German universities according to
the recent most TOP 500 list. (see https://www.top500.org/list/2019/06/)
CLAIX-2018
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CLAIX-2018 is the main building block of CLAIX—the HPC Cluster of RWTH
Aachen University—along with the previously installed CLAIX-2016. It
consists of about 1300 nodes with two 24-core Intel Skylake processors
and 192 GB of main memory, 54 of which are additionally equipped with
two NVIDIA Volta V100 GPUs. As with CLAIX-2016, all nodes are
connected via a fast Intel OmniPath network. An additional Lustre file
system provides 10 PB of fast storage.
CLAIX-2018 is available to students and researchers of RWTH Aachen
University. In addition, researchers from all over Germany can apply
for resources on CLAIX-2018. Furthermore, researchers from FZ Jülich
and RWTH with high demand for compute power can apply for resources on
CLAIX-2018 (as well as on CLAIX-2016) as part of the JARA-HPC partition.
aiXcelerate 2019
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Focusing on CLAIX-2018, the aiXcelerate 2019 workshop consists of two
parts:
1. Monday – Tuesday: Introduction to Performance Engineering and
Analysis Presentations hands-on exercises on prepared examples are
open to a broader auditorium
2. Wednesday – Thursday: Hands-on tuning workshop on participants’
codes only for a limited number of selected computing projects.
We are happy to announce Michael Klemm and Mikko Byckling from Intel
as well as Thomas Gruber from RRZE Erlangen as external HPC
performance experts, who will support the IT Center’s HPC Team as
instructors and during tuning efforts.
Presentations will be given in English.
aiXcelerate 2019 – Part I:
Introduction to Performance Engineering and Analysis
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Monday, December 2, 10:00 – 17:30
Tuesday, December 3, 9:00 – 17:30
We will introduce the basic terminology of performance engineering and
analysis. Next to key metrics of application performance, we will
introduce a workflow to identify and quantify performance bottlenecks
and a performance engineering methodology to cure performance
deficiencies.
We will showcase a selection of performance and correctness tools for
shared-memory programming, message passing, and I/O. The presentations
are also accompanied by simple hands-on exercises that give you a
first impression of the tools presented when applying them to prepared
code examples.
Course level:
- Intermediate
Target audience:
- HPC Programmers and HPC Users interested in learning about available
tools to ensure correctness and optimize performance of HPC applications
Prerequisites:
- Introduction to HPC (see
https://doc.itc.rwth-aachen.de/display/VE/Introduction+to+High-Performance+Computing+2019)
- Basic and intermediate knowledge of parallel programming in HPC
(e.g., see PPCES: www.itc.rwth-aachen.de/ppces)
aiXcelerate 2019 – Part II:
Hands-on Tuning Workshop
---------------------------
Wednesday, December 4, 9:00 – 17:30
Thursday, December 5, 9:00 – 17:30
We will introduce the Intel performance tool VTune and assist you in
applying it (and other tools presented in the aiXcelerate tutorial) on
your own application code. Tuning efforts will focus on C/C++/Fortran
codes on the CLAIX-2018 platform, with its Skylake processors and
OmniPath fabric. We expect you to bring your own application code,
ready to (build and) run on CLAIX-2018 with the Intel compiler
toolchains. We further expect you to provide/configure an input data
set for your application that uses representative code parts of your
production code and restricts the runtime to a few minutes.
In the case you cannot disclose your application source code during
the workshop and want to investigate the performance of your
application as a prebuilt binary, please ensure that your application
is built with debugging symbols enabled.
In the case you are not able to bring in your own code, we will
provide well prepared benchmark codes for you to work on, in order for
you to familiarize with the performance tools and enable you to apply
them on your own codes after the workshop.
Please contact us if you are interested to participate in the tuning
activities by sending e-mail to hpcevent@itc.rwth-aachen.de.
Course level:
- Advanced
Target audience:
- HPC Programmers
Prerequisites:
- Targeted application running on CLAIX 2018
- Tuning input set that triggers production parts of the targeted
application, but restricts runtime to a few minutes.
- Intermediate knowledge in parallel programming for HPC: (e.g.,
“Intro to HPC, PPCES, and aiXcelerate Tutorial”)
Please find further information and a link to the registration for the
aiXcelerate tutorial on our website at:
www.itc.rwth-aachen.de/aixcelerate